Deep learning has progressed rapidly in recent years and has been applied in many fields, which are the main fields of artificial intelligence. Traditional methods of machine learning most use shallow structures to deal with a limited number of samples and computational units. When the target objects have rich meanings, the performance and ability to generalize complex classification problems will be quite inadequate. The convolutional neural network (CNN), which has been developed in recent years, widely used in image processing; because it has high skills in dealing with image classification and image recognition issues and it has led to great care in many machine learning tasks and it has become a powerful and universal model of deep learning. The combination of deep learning and embedded systems has created good technical dimensions. In this paper, several useful models in the field of image classification optimization, based on convolutional neural network and embedded systems, are discussed. Since this paper focuses on usable models on the FPGA board, models known for embedded systems such as MobileNet, ResNet, ResNeXt and ShuffNet have been studied.
Deep learning has developed rapidly in recent years and has been applied in many areas that are major areas of artificial intelligence. The combination of deep learning and embedded systems has created good dimensions in the technical field. In this paper, a deep learning neural network algorithm can be designed that can be implemented on FPGA hardware. The PyTorch and CUDA were used as assistant methods. Convolution neural network (CNN) was also used for image classification. Three good CNN models such as ResNet, ResNeXt and MobileNet were reviewed in this article. Using these models in the design, an algorithm was eventually designed with the MobileNet model. Models were selected from different aspects such as floating operation point (FLOP), number of parameters and classification accuracy. In fact, the MobileNet-based algorithm was selected with a top-1 error of 5.5% in software with a 6-class data set. In addition, hardware simulation in MobileNet-based algorithms was presented. The parameters were converted from floating numbers to 8-bit integers. The output numbers of each layer were cut into integer fixed bits to fit the hardware constraint. A method based on working with numbers was designed to simulate number changes in hardware. The results of simulation show that, the top-1 error increased to 12.3%, which is acceptable.
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